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WP 3 – Integrated Sensor Grant Agreement number: 250072 Project acronym: ISENSE Project title: Integrated Quantum Sensors Funding Scheme: STREP (ICT-FET-Open) Date of latest version of Annex I against which the assessment will be made: 4. March 2011
1. July 2011 to
30. June 2012
WP 3- Integrated Sensor Work package leader: Bham Introduction The overall objective is to demonstrate the iSense technology platform in a proof-of-principle instrument and to include all electronic modules needed to operate and control the lasers, magnetic field coils, and other components. The particular instrument chosen is an optical lattice based cold atom gravity sensor, which will bring together all aspects of the technology platform and all expertise generated. The work package is organised in two tasks, which are listed in the table below. Task-Nr. 3.1 3.2
Task Electronics Integrated gravity sensor
Task Leader LUH Bham
Summary of progress towards objectives and details for each task; Task 3.1 Electronics The development of all electronics modules has been finished and production/delivery started. Tests on a laser driver stack have been performed including high-level software interface and showed performance according to the specifications for iSense. Task 3.2 Integrated gravity sensor We have finalized most parts of the full system design including laser system, optical system, electronics, science chamber, atom chip. The only remaining part to be designed is the mounting hardware, which will be done, once the system is assembled.
Details for each task Task 3.1 - Develop basic electronic modules which are computer controlled (months 1-18) • The driver for the ion getter pump has been delivered. • Hardware to drive the integrated optics components is in development. • Mass-production of temperature controllers and laser current drivers has begun. • Planning of the frequency generator and microwave frequency chain has begun. - Develop FPGA based laser frequency control methods (months 1-24) The FPGA-based laser frequency controller can stabilize a DFB diode on a Rubidium transition. The offset-lock was shown before. The development of the FPGA-based frequency controller is finished. The main tests are completed and all features are implemented. The next version, which should arrive in October, has some minor modifications for spectroscopy with external modulators. It is planned to deliver the frequency controller in November to Birmingham.
Figure 30: FPGA based frequency controller
- Develop a compact frequency reference chain operating at 6.8 GHz (months 1-27) For the generation of the microwave reference frequency, we have compared in terms of performances, price and performances several possible solutions, based on different systems and subsystems, either lab-made or commercial (standard or custom). The use of an integrated PLL-DRO (a microwave oscillator that can be locked onto an RF reference) offers a large gain in compacity with respect the lab-made “standard” architecture. The phase noise of a low noise PLL-DRO at 7 GHz from NEXYN was measured by comparing the noise between two such units synchronized onto the same RF oscillator. The result of this measurement is displayed in the next figure, which reaches a white noise floor of -120 dBrad2/Hz at 10 kHz, compatible with the specifications of the project. The level of 1/f noise at lower frequency will not limit the phase noise of the final system.
Phase noise 2 power spectral density (dBrad /Hz)
We ordered from NEXYN a full system, custom-made, combining such a PLL-DRO at 7 GHz to a low phase noise RF source, which will be used as the reference frequency for the
PLL-DRO. The system is planned to be delivered beginning of month 28. This reference signal will then be splitted. Each output will be mixed with an independent DDS signal, in order to generate the reference frequency for the Raman lasers and the modulation frequency for the sideband locking of the Raman lasers. - Design the central computer system and develop the programming to control the electronic modules and to coordinate the experimental sequence. (month 20-30) A basic LabVIEW program has been created by merging sample programs from LUH to control the components delivered to Bham. We have made progress in understanding how the drivers of the modules work and how to operate the modules using them.
Task 3.2 - Design specifications for vacuum chamber and chip design (month 1-24). In order to focus efforts and efficiently progress on this task a vacuum workgroup was established during the last annual review meeting. This workgroup was led by Bham and involved representatives from all relevant partners. In a series of online and in-person discussions all design specifications were established by March 2012, allowing more time for the quotation process and production. The details of vacuum chamber and chip are discussed in WP2.
Tests of prototypes and individual subsystems will be tested (months 12-27).
Figure 31: First stack of electronics delivered to Bham in January 2012.
Bham received in January 2012 a first stack of electronics from LUH. This contains PC100 computer. FPGA and interface board. Fan driver. Laser current driver. Power supply. Temperature sensor. Debug board. Ion pump controller (received May 2012) To test the electronics, we set up a saturated absorption spectroscopy experiment and used the electronics stack to control a prototype DFB diode, on a standard C-mount. The D2 spectral line in 87Rb was observed with a setting of 153.21mA. A ramp signal was applied to the current to sweep across the 87Rb transition. This was done using an external modulator attached to the stack of electronics.
Rb D2 line spectrum obtained using the LUH electronics delivered to Bham. The transitions F=2 - F'=1, F=2 - F'=2 and F=2 - F'=3 are labelled.
The repeatability of this result is very good. Every time the current driver is switched on with the same settings, the spectrum is instantly visible, with no tuning required. This shows the stability and accuracy of the electronics and the laser diode.
- Workshop in order to decide on the atom interrogation scheme (month 24). In view of good progress in the evaluation of schemes, we have been able to hold this workshop ahead of schedule during the iSense meeting in Paris on the 22nd/23rd of March 2012. It was decided to use the scheme demonstrated in Charrière et al, PRA 85 013639 (2012) as the baseline for the iSense sensor.
Clearly significant results The system design has been finalised. A set of miniaturized electronics for controlling cold atom experiments has been developed. The atom sensor scheme has been decided. Deviations from Annex I and their impact on other tasks, available resources and planning NA Reasons for failing to achieve critical objectives and/or not being on schedule and explain the impact on other tasks as well as on available resources NA Statement on the use of resources, highlighting and explaining deviations between actual and planned person-months per work package and per beneficiary in Annex 1 The resources are in general agreement with Annex-I.